The Design For Test (DFT) ASIC Engineer will work within an ASIC team to support both engineering development and manufacturing test. Ability to work remotely from your house.
Design For Test Engineer DFT ASIC Engineer
Required Skills
Experience with the following is a plus:
-VCS
-UVM
-Linux Platforms
-RTL design input using Verilog in large gate type designs
-BSEE or equivalent required;
-5+ years industry experience preferred, internships acceptable
-Strong debug skills from component level to system level
-High-Speed digital design experience
-Strong verbal and written communication skills. Technical reports and presentations of test results required.
-VCS
-UVM
-Linux Platforms
-RTL design input using Verilog in large gate type designs
-BSEE or equivalent required;
-5+ years industry experience preferred, internships acceptable
-Strong debug skills from component level to system level
-High-Speed digital design experience
-Strong verbal and written communication skills. Technical reports and presentations of test results required.
Experience Needed
-Verilog RTL Design
-Technical Skills
-Solid understading of writing RTL that can be targeted towards
synthesis or block level verification,
-Object oriented class-based test bench methodologies such as
VMM, OVM or UVM
-Development of constrained pseudo-random test benches
-Working knowledge of assertion and coverage-based verification
techniques
-Experience with HDL simulators and verification tools
-HDL debugging experience
-Oral Communication - Speaks clearly and persuasively in positive or
negative situations.
-Written Communication - Writes clearly and informatively. Good
documentation skills are a must.
-Teamwork - Contributes to building a positive team spirit.
-Technical Skills
-Solid understading of writing RTL that can be targeted towards
synthesis or block level verification,
-Object oriented class-based test bench methodologies such as
VMM, OVM or UVM
-Development of constrained pseudo-random test benches
-Working knowledge of assertion and coverage-based verification
techniques
-Experience with HDL simulators and verification tools
-HDL debugging experience
-Oral Communication - Speaks clearly and persuasively in positive or
negative situations.
-Written Communication - Writes clearly and informatively. Good
documentation skills are a must.
-Teamwork - Contributes to building a positive team spirit.
Tool Experience Needed
Experience with the following is a plus:
-VCS
-UVM
-Linux Platforms
-RTL design input using Verilog in large gate type designs
-BSEE or equivalent required;
-5+ years industry experience preferred, internships acceptable
-Strong debug skills from component level to system level
-High-Speed digital design experience
-Strong verbal and written communication skills. Technical reports and presentations of test results required.
-VCS
-UVM
-Linux Platforms
-RTL design input using Verilog in large gate type designs
-BSEE or equivalent required;
-5+ years industry experience preferred, internships acceptable
-Strong debug skills from component level to system level
-High-Speed digital design experience
-Strong verbal and written communication skills. Technical reports and presentations of test results required.
